10 Tough UVM Verification Phase MCQs
Q1. During the UVM execution flow, which phase allows the testbench to terminate automatically when all objections have been dropped, even if some components are still waiting inside forked processes?
A) build_phase
B) connect_phase
C) run_phase
D) final_phase
Q2. A verification engineer starts a sequence in main_phase, while another component raises an objection only in run_phase. What is the most likely consequence?
A) Both execute normally because all runtime phases are merged.
B) Phase synchronization may not behave as expected due to different phase domains.
C) UVM automatically moves the sequence to run_phase.
D) No issue occurs because objections are global.
Q3. Which statement correctly describes the relationship between extract_phase and check_phase?
A) extract_phase executes after check_phase.
B) extract_phase gathers simulation results before checking them.
C) check_phase updates coverage information.
D) Both phases execute concurrently.
Q4. If a monitor receives transactions before the scoreboard connects its analysis export, which UVM phase ordering mistake is most likely responsible?
A) report_phase executed too early.
B) connect_phase was incorrectly implemented or omitted.
C) final_phase was skipped.
D) build_phase executed twice.
Q5. A component overrides run_phase() but forgets to call super.run_phase(phase). What is the most accurate consequence?
A) UVM compilation fails.
B) It depends on whether the parent class has functional behavior inside run_phase().
C) Simulation always hangs.
D) Objections are automatically dropped.
Q6. Why is it considered bad practice to create sequence items inside connect_phase?
A) Sequence items are illegal outside run_phase.
B) connect_phase is intended only for TLM connections, not stimulus generation.
C) Memory allocation is disabled during connect_phase.
D) UVM automatically deletes sequence items after connect_phase.
Q7. Which phase is the earliest safe location to retrieve configuration values using uvm_config_db after all configuration settings have been applied?
A) new()
B) build_phase
C) report_phase
D) final_phase
Q8. A driver raises an objection in run_phase but exits without dropping it due to an unexpected timeout. What is the most likely simulation behavior?
A) UVM automatically drops the objection.
B) Simulation continues to report_phase.
C) Simulation hangs indefinitely waiting for objections to clear.
D) Scoreboard forces simulation to end.
Q9. A scoreboard compares expected and actual packets during run_phase, but coverage collection is deferred until simulation completes. Which phase is most appropriate for generating the final coverage summary?
A) reset_phase
B) extract_phase
C) report_phase
D) build_phase
Q10. Which of the following is the strongest reason for separating testbench construction (build_phase) from DUT connections (connect_phase)?
A) To improve simulation speed.
B) To ensure all components exist before establishing TLM and port connections.
C) To reduce memory usage.
D) To avoid factory registration conflicts.
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